Moments of Memory Access Time for Systems With Hierarchical Memories

In this paper we model the hierarchal nature of memory in order to examine the variance, and in general, all moments of the distribution of time memory access. The existence of an unbounded variance for the memory access time can lead to extremely long wait queues and a particular class of distributions that has this property is the power tailed distribution. We present an analytical model to study the response time. We show that under reasonable assumptions for the values of the parameters involved in the memory levels the response-time for such a hierarchical memory system is power tailed. To validate the power-tail behavior of the memory access time we provide results from our simulations. We also provide a simple relation with the system parameters which helps system architects and designers to avoid power-tailed nature (intuitively, ill-behaved) of the response time.